en:pfw:assemblers_rp2040-assembler
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| en:pfw:assemblers_rp2040-assembler [2023-09-04 18:11] – gelöscht - Externe Bearbeitung (Unbekanntes Datum) 127.0.0.1 | en:pfw:assemblers_rp2040-assembler [2023-10-02 17:04] (current) – [Two usage examples] willem | ||
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| + | {{pfw: | ||
| + | ====== Assembler for RP2040 ====== | ||
| + | |||
| + | ===== The idea ===== | ||
| + | |||
| + | A compact Forth-style macro assembler with an efficient literal pool mechanism for the RP2040.\\ | ||
| + | A Forth-style assembler uses all the capabilities of the Forth interpreter and assembles opcodes in between.\\ | ||
| + | An example: | ||
| + | < | ||
| + | code SQUARED | ||
| + | tos tos muls, next, | ||
| + | end-code | ||
| + | </ | ||
| + | ===== Implementation ===== | ||
| + | |||
| + | The example code asumes a 32-bit machine that has 16-bit & 32-bit compile actions. | ||
| + | It is also asumed that the code runs in RAM as noForth T on the RP2040 does. | ||
| + | Because the Thumb-2 opcodes of the ARMv6-M use a RISC like architecture, | ||
| + | are added to make assembly a bit more easy. | ||
| + | An implementation example for '' | ||
| + | |||
| + | <code forth> | ||
| + | (* ( " | ||
| + | +TO ( n " | ||
| + | VOCABULARY | ||
| + | </ | ||
| + | |||
| + | ==== All Thumb2 instructions ==== | ||
| + | |||
| + | <code forth> | ||
| + | |||
| + | ✦ Two low register opcodes | ||
| + | ands, | ||
| + | neg, cmn, orrs, | ||
| + | sxth, | ||
| + | revsh, | ||
| + | | ||
| + | ✦ Two all register opcodes | ||
| + | add, mov, cmp, | ||
| + | | ||
| + | ✦ Three low register opcodes | ||
| + | adds, | ||
| + | ldrh, | ||
| + | |||
| + | ✦ Two low register & 3-bits immediate | ||
| + | adds, | ||
| + | |||
| + | ✦ Two low register & 5-bits immediate | ||
| + | lsls, | ||
| + | ldr, ldrb, ldrh, | ||
| + | |||
| + | ✦ One low register & 7-bits immediate (RP-specific) | ||
| + | add, subs, sub, | ||
| + | |||
| + | ✦ One low register & 8-bits immediate | ||
| + | movs, | ||
| + | push, | ||
| + | stm, ldm, adds, subs, | ||
| + | |||
| + | ✦ Various 16-bit opcodes | ||
| + | noop, | ||
| + | cpsie, | ||
| + | |||
| + | ✦ Fourteen jump instructions | ||
| + | =? cs? | ||
| + | >? no | ||
| + | |||
| + | ✦ Control structures | ||
| + | if, | ||
| + | begin, | ||
| + | | ||
| + | ✦ Literal pool additions | ||
| + | ALIGN, | ||
| + | |||
| + | ✦ Assembler macros | ||
| + | ALIGN, | ||
| + | -) NEXT, | ||
| + | </ | ||
| + | |||
| + | ==== Two usage examples ==== | ||
| + | |||
| + | < | ||
| + | code LSHIFT ( x1 +n -- x2 ) | ||
| + | day tos movs, \ 1 - +n to DAY | ||
| + | tos sp )+ ldr, \ 2 - pop X1 to TOS | ||
| + | tos day lsls, \ 1 - Shift TOS DAY positions left | ||
| + | next, \ 6 | ||
| + | end-code | ||
| + | |||
| + | code KEY?) ( -- f ) | ||
| + | 40034018 , \ UART0 UARTFR | ||
| + | code> | ||
| + | sun w ) ldr, \ Read UARTFR to SUN | ||
| + | tos sp -) str, \ Push stack | ||
| + | tos sun ) ldr, \ Read flags | ||
| + | tos 1B # lsls, \ Build flag out of bit-4 | ||
| + | tos 1F # asrs, \ Extend sign | ||
| + | tos tos mvns, \ Invert flag | ||
| + | next, | ||
| + | end-code | ||
| + | </ | ||
| + | |||
| + | < | ||
| + | | File name | Purpose | in Dropbox (external link) | | ||
| + | | [[https:// | ||
| + | | [[https:// | ||
| + | | [[https:// | ||
| + | |||
| + | ==== Contributions ==== | ||
| + | |||
| + | < | ||
| + | |||
| + | |||
| + | |||
| + | [[en: | ||