en:pfw:sha-256
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en:pfw:sha-256 [2024-10-17 12:44] – jeroenh | en:pfw:sha-256 [2024-10-17 13:09] (current) – jeroenh | ||
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+ | **Testing the SHA-256 algorithm** | ||
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- | **Testing the SHA-256 algorithm** | ||
Testing the SHA-256 algorithm can be done with the following code. The ' | Testing the SHA-256 algorithm can be done with the following code. The ' | ||
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**Optimising performance of the SHA-256 hash generator - step 1 ** | **Optimising performance of the SHA-256 hash generator - step 1 ** | ||
- | Creating SHA-256 hashes is an area where time of execution is usually seen as relevant. The above version, using generic Forth, will run on most Forth systems. But is not the fastest version possible. Running on wabiForth in tests it achieves a throughput of around 2.6 MB/s. | + | Creating SHA-256 hashes is an area where time of execution is usually seen as relevant. The above version, using generic Forth, will run on most Forth systems |
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- | One way of doing this is to use Forth-Macros as described by Wil Baden in Forth Dimensions (FD) Vol. 19, No. 2. There is a version floating around on the internet which does exactly that and here is an adapted version of that code. It is not totally using generic Forth as I wanted to keep te original as unchanged as possible. | + | |
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+ | One way of optimising performance is to use Forth-Macros, | ||
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\ ANS Forth code for Secure Hash Algorithms SHA-256 | \ ANS Forth code for Secure Hash Algorithms SHA-256 | ||
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**Optimising performance of the SHA-256 hash generator - step 2 ** | **Optimising performance of the SHA-256 hash generator - step 2 ** | ||
- | A more thorough optimisation | + | A more thorough optimisation |
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The following is an example where ARM32 assembly is used for the subloop and the HASH1BLOCK word: | The following is an example where ARM32 assembly is used for the subloop and the HASH1BLOCK word: | ||
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Please note that this is all done using bog-standard ARM32 assembly, no SHA-256 specific opcodes are used. These SHA_256 specific opcodes would increase the performance even more. Another option would be to use the NEON coprocessor. This is available on Raspberry Pi2 and later and would allow some parallel processing of the subloop. If this really raises throughput is as yet unproven. | Please note that this is all done using bog-standard ARM32 assembly, no SHA-256 specific opcodes are used. These SHA_256 specific opcodes would increase the performance even more. Another option would be to use the NEON coprocessor. This is available on Raspberry Pi2 and later and would allow some parallel processing of the subloop. If this really raises throughput is as yet unproven. | ||
en/pfw/sha-256.1729161884.txt.gz · Last modified: 2024-10-17 12:44 by jeroenh