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Sie befinden sich hier: Forth Wiki » Projekte » FIG-Forth - CDP1802 IP - Lattice FPGA-Board
Zuletzt angesehen: • FIG-Forth - CDP1802 IP - Lattice FPGA-Board
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projects:fig-forth-1802-fpga:start

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Nächste Überarbeitung		Vorhergehende Überarbeitung
projects:fig-forth-1802-fpga:start [2016-12-01 11:23] – mkaprojects:fig-forth-1802-fpga:start [2016-12-23 19:51] (aktuell) – mka
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 {{:projects:fig-forth-1802-fpga:figforth_ice8k.zip |}}  {{:projects:fig-forth-1802-fpga:figforth_ice8k.zip |}} 
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 +{{ :projects:fig-forth-1802-fpga:figforth1802-disassemblerlisting.odt |}} {{ :projects:fig-forth-1802-fpga:figforth1802-disassemblerlisting.pdf |}}
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 +{{ :projects:fig-forth-1802-fpga:figforthhexdump.zip |}}
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 +And here is the [[https://github.com/Steve-Teal/1802-pico-basic|CDP1802 IP VHDL Code]] as well. Steve decided not to include SPI support on the first release, but GPIO has been included. He needs to work on the readme file to explain how to build and deploy to the target board and some notes on how to use UT4 and TB. This core comes with Tiny Basic, but the FIG Forth is made with the same core. (23.12.2016 - come back and check for updates!)
  
 {{:projects:fig-forth-1802-fpga:figforth1802terminal.jpg?|terminal screen shot}}  {{:projects:fig-forth-1802-fpga:figforth1802terminal.jpg?|terminal screen shot}} 
projects/fig-forth-1802-fpga/start.1480587795.txt.gz · Zuletzt geändert: von mka